Job Description

Seeking an experienced technologist to research and explore future logic technology paths, capabilities, and applications through design/system-technology optimization. The role involves researching and evaluating new device architectures, materials, and integration schemes for sub-3nm technology nodes.

Responsibilities

• Develop and analyze new CMOS and beyond-CMOS device architectures
• Develop internal benchmarking capability and create assessments
• Develop realistic device-level PPAC analysis for new technology options

Requirements

• PhD in related field and 15+ years of industry experience
• Experience with CMOS device architectures and logic structures
• Hands-on experience with EDA tools
• Expertise in applying Machine Learning algorithms
• Deep knowledge of device physics for 3D logic structures
• Understanding of requirements for low-power, high-performance, embedded memory
• Expertise in design and optimizations of advanced logic and memory standard cells

Benefits

• No benefits